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TFDU6301
Vishay Semiconductors
Fast Infrared Transceiver Module (FIR, 4 Mbit/s) for 2.4 V to 3.6 V Operation and Low-Voltage Logic (1.8 V)
Description
The TFDU6301 transceiver is an infrared transceiver module compliant to the latest IrDA physical layer low-power standard for fast infrared data communication, supporting IrDA speeds up to 4 Mbit/s (FIR), HP-SIR(R), Sharp ASK(R) and carrier based remote control modes up to 2 MHz. Integrated within the transceiver module is a photo PIN diode, an infrared emitter (IRED), and a low-power control IC to provide a total front-end solution in a single package. This new Vishay FIR transceiver is built in a new smaller package using the experiences of the lead frame BabyFace technology. The transceivers are capable of directly interfacing with a wide variety of I/O devices, which perform the modulation/ demodulation function. At a minimum, a VCC bypass capacitor is the only external component required implementing a
20101
complete solution. TFDU6301 has a tri-state output and is floating in shutdown mode with a weak pull-up. An otherwise identical transceiver with supply voltage related logic levels is available as TFDU6301.
Features
* Compliant to the latest IrDA physical layer specification (up to 4 Mbit/s) with an extended low power range of > 70 cm e3 (typ. 1 m) and TV remote control (> 9 m) * Operates from 2.4 V to 3.6 V within specification * Low power consumption (1.8 mA typ. supply current) * Power shutdown mode (0.01 A typ. shutdown current) * Surface mount package - Universal (L 8.5 mm x H 2.5 mm x W 3.1 mm) * Tri-state-receiver output, floating in shut down with a weak pull-up * Low profile (universal) package capable of surface mount soldering to side and top view orientation * Directly interfaces with various super I/O and controller devices * Only one external component required * Split power supply, transmitter and receiver can be operated from two power supplies with relaxed requirements saving costs * Internal logic voltage reference of 1.8 V * Lead (Pb)-free device * Qualified for lead (Pb)-free and Sn/Pb processing (MSL4) * Device in accordance with RoHS 2002/95/EC and WEEE 2002/96EC
Applications
* Notebook computers, desktop PCs, palmtop computers (Win CE, Palm PC), PDAs * Digital cameras and video cameras * Printers, fax machines, photocopiers, screen projectors * Telecommunication products (cellular phones, pagers) * Internet TV boxes, video conferencing systems * External infrared adapters (dongles) * Medical and industrial data collection
Parts Table
Part TFDU6301-TR3 TFDU6301-TT3 TFDU6301-TR1 TFDU6301-TT1 Description Oriented in carrier tape for side view surface mounting Oriented in carrier tape for top view surface mounting Oriented in carrier tape for side view surface mounting Oriented in carrier tape for top view surface mounting Qty/reel or tube 2500 pcs 2500 pcs 750 pcs 750 pcs
Document Number 84668 Rev. 1.8, 03-Jul-08
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TFDU6301
Vishay Semiconductors Functional Block Diagram
VCC1 Tri-State Driver Amplifier Comparator VCC2 SD RXD
Logic and Control
TXD
18468_1
Controlled Driver
GND
Figure 1. Functional Block Diagram
Pin Description
Pin number 1 Function Description I/O Active IRED anode to be externally connected to VCC2 (VIRED). For higher VCC2 voltages than 3.6 V an external resistor might be necessary for reducing the internal power dissipation. This pin is allowed to be supplied from an IRED Anode uncontrolled power supply separated from the controlled VCC1 - supply. IRED Cathode TXD IRED cathode, internally connected to driver transistor This input is used to transmit serial data when SD is low. An on-chip protection circuit disables the IRED driver if the TXD pin is asserted for longer than 100 s. When used in conjunction with the SD pin, this pin is also used to control the receiver mode. Logic reference: 1.8 V logic Received data output, push-pull CMOS driver output capable of driving standard CMOS. No external pull-up or pull-down resistor is required. Floating with a weak pull-up of 500 k (typ.) in shutdown mode. High/Low levels adapted to 1.8 V logic. RXD echoes the TXD signal. Shutdown, also used for dynamic mode switching. Setting this pin active places the module into shutdown mode. On the falling edge of this signal, the state of the TXD pin is sampled and used to set receiver low bandwidth (TXD = Low: SIR) or high bandwidth (TXD = High: MIR and FIR) mode. Supply voltage Internally not connected Ground I
2
3
I
High
4
RXD
O
Low
5
SD VCC1 NC GND
I
High
6 7 8
TFDU6301 weight 0.075 g
19531
Figure 2. Pinning
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Document Number 84668 Rev. 1.8, 03-Jul-08
TFDU6301
Vishay Semiconductors Absolute Maximum Ratings
Reference point Pin: GND unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Supply voltage range, transceiver Supply voltage range, transmitter Voltage at all I/O pins Input currents Output sinking current Power dissipation Junction temperature Ambient temperature range (operating) Storage temperature range Soldering temperature Average output current Repetitive pulse output current ESD protection Virtual source size < 90 s, ton < 20 % Human body model Method: (1-1/e) encircled energy d See chapter "Recommended Solder Profiles" IIRED (DC) IIRED (RP) 1 1.8 2.0 PD TJ Tamb Tstg - 25 - 25 Test conditions 0 V < VCC2 < 6 V 0 V < VCC1 < 6 V Vin < VCC1 is allowed For all pins, except IRED anode pin Symbol VCC1 VCC2 Min. - 0.5 - 0.5 - 0.5 Typ. Max. 6 6.5 6 10 25 500 125 + 85 + 85 260 150 700 Unit V V V mA mA mW C C C C mA mA kV mm
Laser/LED safety information With the edition IEC/EN 60825-1:2006 LEDs were removed from the basic laser eye safety standard but are still covered by DIN EN 60825-12 (VDE 0837-12):2004-12 (or equivalent IEC standard). Therefore still a risk assessment is necessary according the test conditions of the basic standard, which were changed in respect to the former editions. We recommend using the so-called simplified method not taking the virtual source size into account. Our devices are tested for not to exceed the given eye safety limit according class 1 using the simplified assessment with C6 = 1. (When the virtual source size would be taken into account, the safety limit is even higher.) LEDs for communication applications are covered by the following safety regulations: IEC/EN 60825-1:2006, DIN EN 60825-12 (VDE 0837-12):2004-12, see above IEC 62471 Ed. 1:2006, "Photobiological Safety of Lamps and Lamp Systems": TFDU6301 is in the "Exempt Group" "DIRECTIVE 2006/25/EC OF THE EUROPEAN PARLIAMENT AND OF THE COUNCIL of 5. April 2006" on the minimum health and safety requirements regarding the exposure of workers to risks arising from physical agents (artificial optical radiation) (19th individual Directive within the meaning of Article 16 (1) of Directive 89/391/EEC): TFDU6301 is in accordance with this regulation.
Definitions: In the Vishay transceiver data sheets the following nomenclature is used for defining the IrDA operating modes: SIR: 2.4 kbit/s to 115.2 kbit/s, equivalent to the basic serial infrared standard with the physical layer version IrPhy 1.0 MIR: 576 kbit/s to 1152 kbit/s FIR: 4 Mbit/s VFIR: 16 Mbit/s MIR and FIR were implemented with IrPhy 1.1, followed by IrPhy 1.2, adding the SIR Low Power Standard. IrPhy 1.3 extended the Low Power Option to MIR and FIR and VFIR was added with IrPhy 1.4. A new version of the standard in any case obsoletes the former version. With introducing the updated versions the old versions are obsolete. Therefore the only valid IrDA standard is the actual version IrPhy 1.4 (in Oct. 2002).
Document Number 84668 Rev. 1.8, 03-Jul-08
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TFDU6301
Vishay Semiconductors Electrical Characteristics Transceiver
Tamb = 25 C, VCC1 = VCC2 = 2.4 V to 3.6 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Supply voltage Test conditions Symbol VCC Min. 2.4 Typ. Max. 3.6 Unit V
Receive mode only, idle In transmit mode, add additional 85 mA (typ) for IRED current. Dynamic supply current SIR mode MIR/FIR mode SD = High T= 25 C, not ambient light sensitive, detector is disabled in shutdown mode SD = High, full specified temperature range, not ambient light sensitive Internally generated Add RXD output current depending on RXD load. ICC ICC ISD 1.8 2.0 3.0 3.3 mA mA A
Shutdown supply current
0.01
Shutdown supply current Operating temperature range Digital Reference Voltage Input voltage low (TXD, SD) Input voltage high1) (TXD, SD) Input leakage current (TXD, SD) Input capacitance, TXD, SD Output voltage low Output voltage high Output RXD current limitation high state low state SD shutdown pulse duration RXD to VCC1 impedance SD mode programming pulse duration
1)
ISD TA Vdd VIL VIH - 25 1.62 - 0.5 1.5 -1 1.8 1.8
1 + 85 1.98 0.5 6 +1 5 0.4 0.8 x Vdd
A C V V V A pF V V
Vin > 1.6 V
IICH CI
IOL = 500 A Cload = 15 pF IOH = - 250 A Cload = 15 pF Short to ground Short to VCC1 Activating shutdown
VOL VOH
20 20 30 RRXD 400 200 500 * 600
mA mA s k ns
All modes
tSDPW
Note: The typical threshold level is 0.5 x Vdd. It is recommended to use the specified min/max values to avoid increased operating current.
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Document Number 84668 Rev. 1.8, 03-Jul-08
TFDU6301
Vishay Semiconductors Optoelectronic Characteristics Receiver
Tamb = 25 C, VCC1 = VCC2 = 2.4 V to 3.6 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Minimum irradiance Ee in angular range2)
1)
Test conditions 9.6 kbit/s to 115.2 kbit/s = 850 nm to 900 nm, VCC = 2.4 V 1.152 Mbit/s = 850 nm to 900 nm, VCC = 2.4 V 4 Mbit/s = 850 nm to 900 nm, VCC = 2.4 V = 850 nm to 900 nm 10 % to 90 %, CL = 15 pF 90 % to 10 %, CL = 15 pF Input pulse length 1.4 s < PWopt < 25 s Input pulse length PWopt = 217 ns, 1.152 Mbit/s Input pulse length PWopt = 125 ns, 4 Mbit/s Input pulse length PWopt = 250 ns, 4 Mbit/s Input irradiance = 100 mW/m2, 4.0 Mbit/s 1.152 Mbit/s 115.2 kbit/s After completion of shutdown programming sequence power on delay
Symbol Ee
Min.
Typ. 50 (5) 100 (10) 130 (13)
Max. 80 (8)
Unit mW/m2 (W/cm2) mW/m2 (W/cm2)
Minimum irradiance Ee in angular range, MIR mode Minimum irradiance Ee inangular range, FIR mode Maximum irradiance Ee in angular range
3)
Ee
Ee 5 (500) 10 10 1.6
200 (20)
mW/m2 (W/cm2) kW/m2 (mW/cm2)
Ee tr (RXD) tf (RXD) tPW tPW
Rise time of output signal Fall time of output signal RXD pulse width of output signal, 50 %, SIR mode RXD pulse width of output signal, 50 %, MIR mode RXD pulse width of output signal, 50 %, FIR mode RXD pulse width of output signal, 50 %, FIR mode
40 40 2.2 3
ns ns s
105
250
275
ns
tPW
105
125
145
ns
tPW
225
250
275
ns
Stochastic jitter, leading edge
25 80 350 250 tL 40 100
ns ns ns s s
Receiver start up time Latency
Note: All timing data measured with 4 Mbit/s are measured using the IrDA(R) FIR transmission header. The data given here are valid 5 s after starting the preamble. 2 1) IrDA low power specification is 90 mW/m . Specification takes into account a window loss of 10 %. 2) IrDA sensitivity definition (equivalent to threshold irradiance): Minimum Irradiance Ee In Angular Range, power per unit area. The receiver must meet the BER specification while the source is operating at the minimum intensity in angular range into the minimum half-angle range at the maximum Link Length. 3) Maximum Irradiance Ee In Angular Range, power per unit area. The optical power delivered to the detector by a source operating at the maximum intensity in angular range at Minimum Link Length must not cause receiver overdrive distortion and possible related link errors. If placed at the Active Output Interface reference plane of the transmitter, the receiver must meet its bit error ratio (BER) specification. For more definitions see the document "Symbols and Terminology" on the Vishay Website (http://www.vishay.com/docs/82512/82512.pdf).
Document Number 84668 Rev. 1.8, 03-Jul-08
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TFDU6301
Vishay Semiconductors Transmitter
Tamb = 25 C, VCC1 = VCC2 = 2.4 V to 3.6 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter IRED operating current, switched current limiter Output pulse width limitation Output leakage IRED current Output radiant intensity, see figure 3, recommended appl. circuit Output radiant intensity, see figure 3, recommended appl. circuit Output radiant intensity Output radiant intensity, angle of half intensity Peak - emission wavelength2) Spectral bandwidth Optical rise time, Optical fall time Optical output pulse duration Optical output pulse duration Optical output pulse duration Optical overshoot Input pulse width 217 ns, 1.152 Mbit/s Input pulse width 125 ns, 4 Mbit/s Input pulse width 250 ns, 4 Mbit/s VCC = VIRED = 3.3 V, = 0 TXD = High, SD = Low VCC = VIRED = 3.3 V, = 0, 15 TXD = High, SD = Low VCC1 = 3.3 V, = 0, 15 TXD = Low or SD = High (Receiver is inactive as long as SD = High) Test conditions Note: No external resistor current limiting resistor is needed Input pulse width t < 20 s Input pulse width 20 s < t < 150 s Input pulse width t 150 s Symbol ID tpw tpw tpw_lim IIRED Ie -1 65 180 18 Min. 330 Typ. 440 t 150 150 1 4681) Max. 600 Unit mA s s s A mW/sr
Ie
50
125
4681)
mW/sr
Ie p tropt, tfopt topt topt topt 10 207 117 242 217 125 250 875
0.04
mW/sr
24 886 45 40 227 133 258 25 900
nm nm ns ns ns ns %
Note: 1) Maximum value is given by eye safety class 1, IEC 60825-1, simplified method. 2) Due to this wavelength restriction compared to the IrDA spec of 850 nm to 900 nm the transmitter is able to operate as source for the (R) standard Remote Control applications with codes as e.g. Philips RC5/RC6 or RECS 80. When operated under IrDA full range conditions (125 mW/sr) the RC range to be covered is in the range from 8 m to 12 m, provided that state of the art remote control receivers are used.
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Document Number 84668 Rev. 1.8, 03-Jul-08
TFDU6301
Vishay Semiconductors Recommended Circuit Diagram
Operated at a clean low impedance power supply the TFDU6301 needs no additional external components. However, depending on the entire system design and board layout, additional components may be required (see figure 3). resistive and inductive wiring should be avoided. The inputs (TXD, SD) and the output RXD should be directly (DC) coupled to the I/O circuit. The capacitor C2 combined with the resistor R2 is the low pass filter for smoothing the supply voltage. R2, C1 and C2 are optional and dependent on the quality of the supply voltages VCCx and injected noise. An unstable power supply with dropping voltage during transmission may reduce the sensitivity (and transmission range) of the transceiver. The placement of these parts is critical. It is strongly recommended to position C2 as close as possible to the transceiver power supply pins. A Tantalum capacitor should be used for C1 while a ceramic capacitor is used for C2. In addition, when connecting the described circuit to the power supply, low impedance wiring should be used. When extended wiring is used the inductance of the power supply can cause dynamically a voltage drop at VCC2. Often some power supplies are not able to follow the fast current rise time. In that case another 4.7 F (type, see table under C1) at VCC2 will be helpful. Keep in mind that basic RF-design rules for circuit design should be taken into account. Especially longer signal lines should not be used without termination. See e.g. "The Art of Electronics" Paul Horowitz, Winfield Hill, 1989, Cambridge University Press, ISBN: 0521370957.
VCC2 VCC1 C1 GND SD TXD RXD
R1 R2 C2
IRED Anode V CC Ground SD TXD RXD IRED Cathode
19307
Figure 3. Recommended Application Circuit
The capacitor C1 is buffering the supply voltage and eliminates the inductance of the power supply line. This one should be a Tantalum or other fast capacitor to guarantee the fast rise time of the IRED current. The resistor R1 is only necessary for high operating voltages and elevated temperatures. Vishay transceivers integrate a sensitive receiver and a built-in power driver. The combination of both needs a careful circuit board layout. The use of thin, long,
Table 1. Recommended Application Circuit Components
Component C1 C2 R1 R2 Recommended value 4.7 F, 16 V 0.1 F, Ceramic No resistor necessary, the internal controller is able to control the current 10 , 0.125 W CRCW-1206-10R0-F-RT1 Vishay part number 293D 475X9 016B VJ 1206 Y 104 J XXMT
Document Number 84668 Rev. 1.8, 03-Jul-08
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TFDU6301
Vishay Semiconductors I/O and Software
In the description, already different I/Os are mentioned. Different combinations are tested and the function verified with the special drivers available from the I/O suppliers. In special cases refer to the I/O manual, the Vishay application notes, or contact directly Vishay Sales, Marketing or Application.
Setting to the Lower Bandwidth Mode (2.4 kbit/s to 115.2 kbit/s)
1. Set SD input to logic "High". 2. Set TXD input to logic "Low". Wait ts 200 ns. 3. Set SD to logic "Low" (this negative edge latches state of TXD, which determines speed setting). 4. TXD must be held for th 200 ns. TXD is now enabled as normal TXD input for the lower bandwidth mode.
Note: When applying this sequence to the device already in the lower bandwidth mode, the SD pulse is interpreted as shutdown. In this case the RXD output of the transceiver may react with a single pulse (going active low) for a duration less than 2 s. The operating software should take care for this condition. In case the applied SD pulse is longer than 4 s, no RXD pulse is to be expected but the receiver startup time is to be taken into account before the device is in receive condition.
Mode Switching
The TFDU6301 is in the SIR mode after power on as a default mode, therefore the FIR data transfer rate has to be set by a programming sequence using the TXD and SD inputs as described below. The low frequency mode covers speeds up to 115.2 kbit/s. Signals with higher data rates should be detected in the high frequency mode. Lower frequency data can also be received in the high frequency mode but with reduced sensitivity. To switch the transceivers from low frequency mode to the high frequency mode and vice versa, the programming sequences described below are required.
Setting to the High Bandwidth Mode (0.576 Mbit/s to 4 Mbit/s)
1. Set SD input to logic "High". 2. Set TXD input to logic "High". Wait ts 200 ns. 3. Set SD to logic "Low" (this negative edge latches state of TXD, which determines speed setting). 4. After waiting th 200 ns TXD can be set to logic "Low". The hold time of TXD is limited by the maximum allowed pulse length. TXD is now enabled as normal TXD input for the high bandwidth mode.
SD
50 %
ts TXD 50 %
th High: FIR 50 % Low: SIR
14873
Figure 4. Mode Switching Timing Diagram
Table 2. Truth table
Inputs SD High TXD x High High > 150 s Low Low Low Low Optical input irradiance x x x <4 > Min. detection threshold irradiance < Max. detection threshold irradiance > Max. detection threshold irradiance mW/m2 RXD weakly pulled (500 k) to VCC1 Low (echo) High High Low (active) x Outputs Transmitter 0 Ie 0 0 0 0
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Document Number 84668 Rev. 1.8, 03-Jul-08
TFDU6301
Vishay Semiconductors Recommended Solder Profiles
Solder Profile for Sn/Pb Soldering Storage The storage and drying processes for all VISHAY transceivers (TFDUxxxx and TFBSxxx) are equivalent to MSL4. The data for the drying procedure is given on labels on the packing and also in the application note "Taping, Labeling, Storage and Packing" (http://www.vishay.com/doc?82601).
260 240 220 200 180 160 140 120 100 80 60 40 20 0 0
19535
240 C max.
10 s max. at 230 C
Temperature (C)
2 to 4 C/s 160 C max. 120 to180 s 2 to 4 C/s
90 s max.
275 250 50 100 150 200 250 300 350 225 200 175 150 125 100 75 50 25 0
19532
T 255 C for 10 s....30 s T 217 C for 70 s max.
Tpeak = 260 C
Time/s
Figure 5. Recommended Solder Profile for Sn/Pb Soldering
Temperature/C
30 s max. 90 s to 120 s 2 C to 3 C/s 70 s max. 2 C to 4 C/s
Lead (Pb)-Free, Recommended Solder Profile The TFDU6301 is a lead (Pb)-free transceiver and qualified for lead (Pb)-free processing. For lead (Pb)-free solder paste like Sn (3.0 - 4.0) Ag (0.5 - 0.9) Cu, there are two standard reflow profiles: RampSoak-Spike (RSS) and Ramp-To-Spike (RTS). The Ramp-Soak-Spike profile was developed primarily for reflow ovens heated by infrared radiation. With widespread use of forced convection reflow ovens the Ramp-To-Spike profile is used increasingly. Shown below in figure 6 and 7 are VISHAY's recommended profiles for use with the TFDU6301 transceivers. For more details please refer to the application note "SMD Assembly Instructions" (http://www.vishay.com/doc?82602). A ramp-up rate less than 0.9 C/s is not recommended. Ramp-up rates faster than 1.3 C/s could damage an optical part because the thermal conductivity is less than compared to a standard IC. Wave Soldering For TFDUxxxx and TFBSxxxx transceiver devices wave soldering is not recommended. Manual Soldering Manual soldering is the standard method for lab use. However, for a production process it cannot be recommended because the risk of damage is highly dependent on the experience of the operator. Nevertheless, we added a chapter to the above mentioned application note, describing manual soldering and desoldering.
Document Number 84668 Rev. 1.8, 03-Jul-08
0
50
100
150
200
250
300
350
Time/s
Figure 6. Solder Profile, RSS Recommendation
280 260 240 220 200 180 160 140 120 100 80 60 40 20 0 0 50
Tpeak = 260 C max.
Temperature/C
< 4 C/s 1.3 C/s Time above 217 C t 70 s Time above 250 C t 40 s < 2 C/s Peak temperature Tpeak = 260 C
100
150
200
250
300
TFDU Fig3
Time/s
Figure 7. RTS Recommendation
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TFDU6301
Vishay Semiconductors Package Dimensions in mm
TFDU6301 (Universal) Package
20627
Footprint
7 x 0.95 = 6.65 0.2* 0.95
Mounting Center
Mounting Center
0.4
(1.82)
1.4
1.4
0.7 (8 x)
Top View
* min 0.2 Photoimageable solder mask recommended between pads to prevent bridgeing
Side View
Figure 8. Package Drawing
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Document Number 84668 Rev. 1.8, 03-Jul-08
(0.25)
20626
0.7
1.2
TFDU6301
Vishay Semiconductors Reel Dimensions in mm
Drawing-No.: 9.800-5090.01-4 Issue: 1; 29.11.05
14017
Figure 9. Reel Drawing
Tape width mm 16 16
A max. mm 180 330
N mm 60 50
W1 min. mm 16.4 16.4
W2 max. mm 22.4 22.4
W3 min. mm 15.9 15.9
W3 max. mm 19.4 19.4
Document Number 84668 Rev. 1.8, 03-Jul-08
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TFDU6301
Vishay Semiconductors Tape Dimensions in mm
Drawing-No.: 9.700-5280.01-4 Issue: 1; 03.11.03
19855
Figure 10. Tape Drawing, TFDU6301 for Top View Mounting
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Document Number 84668 Rev. 1.8, 03-Jul-08
TFDU6301
Vishay Semiconductors Tape Dimensions in mm
19856
Drawing-No.: 9.700-5279.01-4 Issue: 1; 08.12.04
19856
Figure 11. Tape Drawing, TFDU6301 for Side View Mounting
Document Number 84668 Rev. 1.8, 03-Jul-08
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TFDU6301
Vishay Semiconductors Ozone Depleting Substances Policy Statement
It is the policy of Vishay Semiconductor GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (ODSs). The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. Vishay Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively. 2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency (EPA) in the USA. 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively. Vishay Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances.
We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use Vishay Semiconductors products for any unintended or unauthorized application, the buyer shall indemnify Vishay Semiconductors against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. Vishay Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany
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Document Number 84668 Rev. 1.8, 03-Jul-08
Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, "Vishay"), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay's terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000 Revision: 18-Jul-08
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